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Xenon Hardware Overview
By Pete Isensee, Development Lead, Xbox Advanced Technology Group
This documentation is an early release of the final documentation, which may be changed substantially prior to final commercial release, and is confidential and proprietary information of MS Corporation. It is disclosed pursuant to a nondisclosure agreement between the recipient and MS.
“Xenon†is the code name for the successor to the Xbox® game console from MS. Xenon is expected to launch in 2005. This white paper is designed to provide a brief overview of the primary hardware features of the console from a game developer’s standpoint.
Caveats
In some cases, sizes, speeds, and other details of the Xenon console have not been finalized. Values not yet finalized are identified with a “+†sign, indicating that the numbers may be larger than indicated here. At the time of this writing, the final console is many months from entering production. Based on our experience with Xbox, it’s likely that some of this information will change slightly for the final console.
For additional information on various hardware components, see the other relevant white papers.
Hardware Goals
Xenon was designed with the following goals in mind:
•Focus on innovation in silicon, particularly features that game developers need. Although all Xenon hardware components are technologically advanced, the hardware engineering effort has concentrated on digital performance in the CPU and GPU.
•Maximize general purpose processing performance rather than fixed-function hardware. This focus on general purpose processing puts the power into the Xenon software libraries and tools. Rather than being hamstrung by particular hardware designs, software libraries can support the latest and most efficient techniques.
•Eliminate the performance issues of the past. On Xbox, the primary bottlenecks were memory and CPU bandwidth. Xenon does not have these limitations.
Basic Hardware Specifications
Xenon is powered by a 3.5+ GHz IBM PowerPC processor and a 500+ MHz ATI graphics processor. Xenon has 256+ MB of unified memory. Xenon runs a custom operating system based on MS® Windows NT®, similar to the Xbox operating system. The graphics interface is a superset of MS® Direct3D® version 9.0.
CPU
The Xenon CPU is a custom processor based on PowerPC technology. The CPU includes three independent processors (cores) on a single die. Each core runs at 3.5+ GHz. The Xenon CPU can issue two instructions per clock cycle per core. At peak performance, Xenon can issue 21 billion instructions per second.
The Xenon CPU was designed by IBM in close consultation with the Xbox team, leading to a number of revolutionary additions, including a dot product instruction for extremely fast vector math and custom security features built directly into the silicon to prevent piracy and hacking.
Each core has two symmetric hardware threads (SMT), for a total of six hardware threads available to games. Not only does the Xenon CPU include the standard set of PowerPC integer and floating-point registers (one set per hardware thread), the Xenon CPU also includes 128 vector (VMX) registers per hardware thread. This astounding number of registers can drastically improve the speed of common mathematical operations.
Each of the three cores includes a 32-KB L1 instruction cache and a 32-KB L1 data cache. The three cores share a 1-MB L2 cache. The L2 cache can be locked down in segments to improve performance. The L2 cache also has the very unusual feature of being directly readable from the GPU, which allows the GPU to consume geometry and texture data from L2 and main memory simultaneously.
Xenon CPU instructions are exposed to games through compiler intrinsics, allowing developers to access the power of the chip using C language notation.
GPU
The Xenon GPU is a custom 500+ MHz graphics processor from ATI. The shader core has 48 Arithmetic Logic Units (ALUs) that can execute 64 simultaneous threads on groups of 64 vertices or pixels. ALUs are automatically and dynamically assigned to either pixel or vertex processing depending on load. The ALUs can each perform one vector and one scalar operation per clock cycle, for a total of 96 shader operations per clock cycle. Texture loads can be done in parallel to ALU operations. At peak performance, the GPU can issue 48 billion shader operations per second.
The GPU has a peak pixel fill rate of 4+ gigapixels/sec (16 gigasamples/sec with 4× antialiasing). The peak vertex rate is 500+ million vertices/sec. The peak triangle rate is 500+ million triangles/sec. The interesting point about all of these values is that they’re not just theoretical—they are attainable with nontrivial shaders.
Xenon is designed for high-definition output. Included directly on the GPU die is 10+ MB of fast embedded dynamic RAM (EDRAM). A 720p frame buffer fits very nicely here. Larger frame buffers are also possible because of hardware-accelerated partitioning and predicated rendering that has little cost other than additional vertex processing. Along with the extremely fast EDRAM, the GPU also includes hardware instructions for alpha blending, z-test, and antialiasing.
The Xenon graphics architecture is a unique design that implements a superset of Direct3D version 9.0. It includes a number of important extensions, including additional compressed texture formats and a flexible tessellation engine. Xenon not only supports high-level shading language (HLSL) model 3.0 for vertex and pixel shaders but also includes advanced shader features well beyond model 3.0. For instance, shaders use 32-bit IEEE floating-point math throughout. Vertex shaders can fetch from textures, and pixel shaders can fetch from vertex streams. Xenon shaders also have the unique ability to directly access main memory, allowing techniques that have never before been possible.
By Pete Isensee, Development Lead, Xbox Advanced Technology Group
This documentation is an early release of the final documentation, which may be changed substantially prior to final commercial release, and is confidential and proprietary information of MS Corporation. It is disclosed pursuant to a nondisclosure agreement between the recipient and MS.
“Xenon†is the code name for the successor to the Xbox® game console from MS. Xenon is expected to launch in 2005. This white paper is designed to provide a brief overview of the primary hardware features of the console from a game developer’s standpoint.
Caveats
In some cases, sizes, speeds, and other details of the Xenon console have not been finalized. Values not yet finalized are identified with a “+†sign, indicating that the numbers may be larger than indicated here. At the time of this writing, the final console is many months from entering production. Based on our experience with Xbox, it’s likely that some of this information will change slightly for the final console.
For additional information on various hardware components, see the other relevant white papers.
Hardware Goals
Xenon was designed with the following goals in mind:
•Focus on innovation in silicon, particularly features that game developers need. Although all Xenon hardware components are technologically advanced, the hardware engineering effort has concentrated on digital performance in the CPU and GPU.
•Maximize general purpose processing performance rather than fixed-function hardware. This focus on general purpose processing puts the power into the Xenon software libraries and tools. Rather than being hamstrung by particular hardware designs, software libraries can support the latest and most efficient techniques.
•Eliminate the performance issues of the past. On Xbox, the primary bottlenecks were memory and CPU bandwidth. Xenon does not have these limitations.
Basic Hardware Specifications
Xenon is powered by a 3.5+ GHz IBM PowerPC processor and a 500+ MHz ATI graphics processor. Xenon has 256+ MB of unified memory. Xenon runs a custom operating system based on MS® Windows NT®, similar to the Xbox operating system. The graphics interface is a superset of MS® Direct3D® version 9.0.
CPU
The Xenon CPU is a custom processor based on PowerPC technology. The CPU includes three independent processors (cores) on a single die. Each core runs at 3.5+ GHz. The Xenon CPU can issue two instructions per clock cycle per core. At peak performance, Xenon can issue 21 billion instructions per second.
The Xenon CPU was designed by IBM in close consultation with the Xbox team, leading to a number of revolutionary additions, including a dot product instruction for extremely fast vector math and custom security features built directly into the silicon to prevent piracy and hacking.
Each core has two symmetric hardware threads (SMT), for a total of six hardware threads available to games. Not only does the Xenon CPU include the standard set of PowerPC integer and floating-point registers (one set per hardware thread), the Xenon CPU also includes 128 vector (VMX) registers per hardware thread. This astounding number of registers can drastically improve the speed of common mathematical operations.
Each of the three cores includes a 32-KB L1 instruction cache and a 32-KB L1 data cache. The three cores share a 1-MB L2 cache. The L2 cache can be locked down in segments to improve performance. The L2 cache also has the very unusual feature of being directly readable from the GPU, which allows the GPU to consume geometry and texture data from L2 and main memory simultaneously.
Xenon CPU instructions are exposed to games through compiler intrinsics, allowing developers to access the power of the chip using C language notation.
GPU
The Xenon GPU is a custom 500+ MHz graphics processor from ATI. The shader core has 48 Arithmetic Logic Units (ALUs) that can execute 64 simultaneous threads on groups of 64 vertices or pixels. ALUs are automatically and dynamically assigned to either pixel or vertex processing depending on load. The ALUs can each perform one vector and one scalar operation per clock cycle, for a total of 96 shader operations per clock cycle. Texture loads can be done in parallel to ALU operations. At peak performance, the GPU can issue 48 billion shader operations per second.
The GPU has a peak pixel fill rate of 4+ gigapixels/sec (16 gigasamples/sec with 4× antialiasing). The peak vertex rate is 500+ million vertices/sec. The peak triangle rate is 500+ million triangles/sec. The interesting point about all of these values is that they’re not just theoretical—they are attainable with nontrivial shaders.
Xenon is designed for high-definition output. Included directly on the GPU die is 10+ MB of fast embedded dynamic RAM (EDRAM). A 720p frame buffer fits very nicely here. Larger frame buffers are also possible because of hardware-accelerated partitioning and predicated rendering that has little cost other than additional vertex processing. Along with the extremely fast EDRAM, the GPU also includes hardware instructions for alpha blending, z-test, and antialiasing.
The Xenon graphics architecture is a unique design that implements a superset of Direct3D version 9.0. It includes a number of important extensions, including additional compressed texture formats and a flexible tessellation engine. Xenon not only supports high-level shading language (HLSL) model 3.0 for vertex and pixel shaders but also includes advanced shader features well beyond model 3.0. For instance, shaders use 32-bit IEEE floating-point math throughout. Vertex shaders can fetch from textures, and pixel shaders can fetch from vertex streams. Xenon shaders also have the unique ability to directly access main memory, allowing techniques that have never before been possible.